1) Field of the Invention
This invention relates generally to the fabrication of metal layers and interconnects for semiconductor devices and more particularly to a heat treatment for interconnects comprising a titanium nitride Anti-Reflection Coating (ARC) layer over an aluminum layer.
2) Description of the Prior Art
Metal layers and interconnects are important technologies in semiconductor manufacturing. Interconnects electrically connect together different conductive wiring layers in a semiconductor chip. The conductive layers can be layers formed on a substrate surface, such as source/drain contacts or gate structures, or overlying metal wiring layers. It is important that these interconnects, vias, and conductive wiring layers be reliable, be as small as possible to miniaturize the circuit and have wide process windows for high yields.
Often metal layers are formed having overlying anti-reflective coating (ACR layers. These anti-reflective coating layers (such as titanium nitride anti-reflective coating (TiN ACR) layers improve photolithographic processes by providing a dull surface overlying the reflective metal lines.
In addition to the overlying ARC layers, metal layers are formed having underlying barrier layers, such as Ti:W, TiSi.sub.2, TiN, etc. These layers are critical in helping the metal layers, usually aluminum, to adhere to various surfaces, such as oxides. The layers also block aluminum metal from spiking out and reacting with other surfaces, such as silicon. The combination of layers is called a metal stack (for example, a bottom TiN layer, a middle aluminum layer and a top TiN layer).
As shown in FIGS. 4 and 5, we have found that current processes for forming metal layers and interconnects have problems related to stress. FIGS. 4 and 5 show a Ti layer 44, an Al layer 48, an ARC TiN layer 50 (a metal stack) formed over an insulating layer 40. The stress can cause peeling and delamination of the metal stack. More particularly, a top Anti-Reflection Coating TiN layer 50 delaminates from an underlying aluminum layer 48 as shown in FIGS. 4 and 5. Also the stress can cause blemishes, slits, voids, silicon precipitates (nodules) and hillocks. The void/blemish problem appears to be worse on higher temperature aluminum formation processes.
Others have attempted to solve similar problems. U.S. Pat. No. 5,298,436 (Radosevich) shows varying the deposition rate to give lower stress. U.S. Pat. No. 5,017,508 (Dodt) shows the use of annealing by RTA for annealing irradiation induced damage. However, these methods can be further improved.
Therefore, there exists a need to develop processes that relieve stress in metal/TiN ARC layers that are tailored to the deposition processes used to form these layers. There exists a need for a process that eliminates the peeling and blemishing of a TiN Arc layer over an Al layer.